Embodiments relate to a semiconductor device and a method for manufacturing the same, and more particularly, to an Extended Drain Metal Oxide Semiconductor (EDMOS) transistor device and method of manufacture. One of the components a semiconductor device may require is a transistor that controls high voltages. An EDMOS transistor may be used for this purpose. The EDMOS transistor has a relatively thick oxide layer between the gate and drain, for improving the insulating characteristics between the gate and drain to which the high voltage is applied. A related EDMOS transistor is explained with reference to FIG. 1.
FIG. 1 is a cross-sectional view illustrating a method for forming a related EDMOS transistor. As shown in FIG. 1, a first gate oxide layer 2 is formed over a specific region of a semiconductor substrate 1. Specifically, the first gate oxide layer 2 is formed in the following manner. First, a nitride layer pattern having an opening is formed over the semiconductor substrate 1. The opening exposes the specific region of the semiconductor substrate 1. A thermal oxidation process is performed on the semiconductor substrate 1 including the nitride layer pattern to form the first gate oxide layer 2. The nitride layer pattern is then removed.
A doped drift region 3 is formed in the semiconductor substrate 1 under the first gate oxide layer 2. A source region 4s and a drain region 4d are formed in the semiconductor substrate 1 at both sides of the first gate oxide layer 2. The source region 4s is formed to be horizontally separated from the first gate oxide layer 2. The drain region 4d is formed to be adjacent to the first gate oxide layer 2. The doped drift region 3 and the drain region 4d are in contact with each other. The doped drift region 3 and the source and drain regions 4s and 4d are doped with the same type of impurities.
A second gate oxide layer 5 is formed over the semiconductor substrate 1 between the source region 4s and the first gate oxide layer 2. The second gate oxide layer 5 is formed to be thinner than the first gate oxide layer 2. A gate electrode 6 is formed over the first and second gate oxide layers 2 and 5. The gate electrode 6 is formed to cover a part of the first gate oxide layer 2. Accordingly, the gate electrode 6 and the drain region 4d are separated from each other.
In the EDMOS transistor formed according to the above method, the relatively thick first gate oxide layer 2 provides sufficient insulation between the gate electrode 6 and the drain region 4d even if a high voltage is applied to the drain region 4d. The doped drift region 3 is formed with a lower impurity concentration than the drain region 4d. This improves the breakdown voltage between the source region 4s and the drain region 4d. 
However, the first gate oxide layer 2 in the related EDMOS transistor is formed through a LOCOS process using a nitride layer pattern. This causes a bird's beak phenomenon at the perimeter of the first gate oxide layer 2, which makes it difficult to reduce the planar area of the EDMOS transistor. However, reducing the planar area of the EDMOS transistor allows the integration density of semiconductor devices to increase.